| Bartels :: Bartels AutoEngineer :: BAE Documentation :: BAE Libraries :: Schematic Libraries :: Digital Logic ICs :: D54S |
Bartels AutoEngineer® - Symbol and Part Libraries2.2.9 Library D54S - ICs Digital, Bipolar TTL Series 54S IEEE/DIN |
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| Library D54S - SCM Symbols/Parts | ||||||
|---|---|---|---|---|---|---|
| Symbol / Part | Description / Function | Package Assignment(s) | Manufacturer(s) | Marker | SCM Sheets(s) using Symbol |
Last Change |
| 54s00 | Quad 2 Input NAND Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s02 | Quad 2 Input NOR Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s03 | Quad 2 Input NAND Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s04 | Hex Inverter TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s05 | Hex Inverter TTL Output: Open Collector |
default dil14 | - | pin | 09/05/2006 | |
| 54s08 | Quad 2 Input AND Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s09 | Quad 2 Input AND Gate TTL Output: Open Collector |
default dil14 | - | pin | 09/05/2006 | |
| 54s10 | Triple 3 Input NAND Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s11 | Triple 3 Input AND Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s15 | Triple 3 Input AND Gate TTL Output: Open Collector |
default dil14 | - | pin | 09/05/2006 | |
| 54s20 | Dual 4 Input NAND Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s22 | Dual 4 Input NAND Gate TTL Output: Open Collector |
default dil14 | - | pin | 09/05/2006 | |
| 54s30 | 8 Input NAND Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s32 | Quad 2 Input OR Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s37 | Quad 2 Input NAND Buffer TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s38 | Quad 2 Input NAND Buffer TTL Output: Open Collector |
default dil14 | - | pin | 09/05/2006 | |
| 54s40 | Dual 4 Input NAND Buffer TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s51 | Dual 2 Wide 2 Input AND-OR-Invert Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s64 | 4-2-3-2 Input AND-OR-Invert Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s65 | 4-2-3-2 Input AND-OR-Invert Gate TTL Output: Open Collector |
default dil14 | - | pin | 09/05/2006 | |
| 54s74 | Dual D-Flip-Flop, Preset + Clear TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s85 | 4 Bit Magnitude Comparator TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s86 | Quad 2 Input Exclusive OR Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s112 | Dual J-K Flip-Flop, Preset + Clear TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s113 | Dual J-K Flip-Flop, Preset TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s114 | Dual J-K Flip-Flop, Preset + Clear TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s124 | Dual Voltage Controlled Oscillator TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s132 | Quad 2 Input Schmitt Trigger TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s133 | 13 Input Positive NAND Gate TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s134 | 12 Input Positive NAND Gate TTL Output: Tri-State |
default dil16 | - | pin | 09/05/2006 | |
| 54s135 | Quad Exclusive OR/NOR Gate TTL Output: Tri-State |
default dil16 | - | pin | 09/05/2006 | |
| 54s138 | 3 of 8 Decoder TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s139 | Dual 2 of 4 Decoder TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s140 | Dual 4 Input NAND Driver TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s148 | 8 to 3 Octal Priority Encoder TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s151 | 8 to 1 Data Selector/Multiplexer TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s153 | Dual 4 to 1 Data Selector/Multiplexer TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s157 | Quad 2 to 1 Multiplexer noninverting TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s158 | Quad 2 to 1 Multiplexer inverting TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s162 | BCD Decade Counter, Sync. Clear TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s163 | 4 Bit Binary Counter, Sync. Clear TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s168 | 4 Bit Decade Up/Down Counter TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s169 | 4 Bit Binary Up/Down Counter TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s174 | Hex D-Flip-Flop TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s175 | Quad D-Flip-Flop TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s181 | 4 Bit ALU/Function Generator TTL Output: Totem Pole |
default dil24, dil24b | - | pin | 09/05/2006 | |
| 54s182 | 16 Bit Look-Ahead Carry Generator TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s189 | 64 (16x4) Bit RAM inverting TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s194 | 4 Bit Universal Shift Register PIPO TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s195 | 4 Bit Shift Register PIPO TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s196 | Presetable Decade (Bi-Quinary) Counter TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s197 | Presetable 4 Bit Binary Counter TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s201 | 256 Bit High Performance RAM TTL Output: Tri-State |
default dil16 | - | pin | 09/05/2006 | |
| 54s226 | 4 Bit Parallel Latched Bus Transceiver | default dil16 | - | pin | 09/05/2006 | |
| 54s240 | Octal Buffer/Line Driver inverting TTL Output: Tri-State |
default dil20 | - | pin | 09/05/2006 | |
| 54s241 | Octal Buffer/Line Driver noninverting TTL Output: Tri-State |
default dil20 | - | pin | 09/05/2006 | |
| 54s244 | Octal Driver noninverting TTL Output: Tri-State |
default dil20 | - | pin | 09/05/2006 | |
| 54s251 | 8 to 1 Data Selector/Multiplexer TTL Output: Tri-State |
default dil16 | - | pin | 09/05/2006 | |
| 54s253 | Dual 4 to 1 Multiplexer TTL Output: Tri-State |
default dil16 | - | pin | 09/05/2006 | |
| 54s257 | Quad 2 to 1 Multiplexer noninverting TTL Output: Tri-State |
default dil16 | - | pin | 09/05/2006 | |
| 54s258 | Quad 2 to 1 Multiplexer inverting TTL Output: Tri-State |
default dil16 | - | pin | 09/05/2006 | |
| 54s260 | Dual 5 Input NOR Gate TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s273 | Octal D-Flip-Flop TTL Output: Totem Pole |
default dil20 | - | pin | 09/05/2006 | |
| 54s280 | 9 Bit Odd/Even Parity Generator/Checker TTL Output: Totem Pole |
default dil14 | - | pin | 09/05/2006 | |
| 54s283 | 4 Bit Full Adder, Fast Carry TTL Output: Totem Pole |
default dil16 | - | pin | 09/05/2006 | |
| 54s289 | 64 (16x4) Bit RAM noninverting TTL Output: Open Collector |
default dil16 | - | pin | 09/05/2006 | |
| 54s299 | 8 Bit Universal PIPO Shift Register TTL Output: Tri-State |
default dil20 | - | pin | 09/05/2006 | |
| 54s301 | 256 Bit High Performance RAM TTL Output: Open Collector |
default dil16 | - | pin | 09/05/2006 | |
| 54s373 | Octal D-Type Transparent Latch and FF TTL Output: Tri-State |
default dil20 | - | pin | 09/05/2006 | |
| 54s374 | Octal D-Type Transparent Latch and FF TTL Output: Tri-State |
default dil20 | - | pin | 09/05/2006 | |
| 54s381 | ALU/Function Generator TTL Output: Totem Pole |
default dil20 | - | pin | 09/05/2006 | |
| 54s436 | Line/Memory Driver | default dil16 | - | pin | 09/05/2006 | |
| 54s437 | Line/Memory Driver | default dil16 | - | pin | 09/05/2006 | |
| 54s484 | BCD to Binary Converter TTL Output: Tri-State |
default dil20 | - | pin | 09/05/2006 | |
| 54s485 | Binary to BCD Converter TTL Output: Tri-State |
default dil20 | - | pin | 09/05/2006 | |
| Library D54S - SCM Markers | |
|---|---|
| Marker | Last Change |
| junction | 21/04/1997 |
| pin | 21/04/1997 |
| terminal | 21/04/1997 |
| Bartels :: Bartels AutoEngineer :: BAE Documentation :: BAE Libraries :: Schematic Libraries :: Digital Logic ICs :: D54S |
Library D54S - ICs Digital, Bipolar TTL Series 54S IEEE/DIN
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