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Bartels :: Bartels AutoEngineer :: BAE Documentation :: BAE User Manual
Contents<<>>

Bartels AutoEngineer® Dokumentation

Bartels AutoEngineer®
User Manual

PDF Version (3.1 MB; updated 11 November 2013)

The Bartels AutoEngineer® - User Manual describes in detail how to use the Bartels AutoEngineer CAE/CAD/CAM design system. The following main topics are covered by this manual:

  • Introduction: System Architecture, general Operating Instructions, Design Database
  • Circuit Design (CAE), Schematic Editor
  • Netlist Processing, Forward and Backward Annotation
  • PCB Design and manufacturing data processing (CAD/CAM), Layout Editor, Autoplacement, Autorouting, CAM Processor, CAM View
  • IC/ASIC Design, Chip Editor for interactive IC mask layout, Cell Placer and Cell Router for place & route, GDS and CIF import and export
  • Neural Rule System
  • Utility Programs
 
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Bartels AutoEngineer® - User Manual 11/11/2009
Preface 
Organization of this Documentation 
Related Documentation 
Problems, Questions, Suggestions 
Documentation Notations 11/10/2010
Documentation Conventions 11/10/2010
Copyright 16/11/2007
1Introduction 26/01/2007
1.1Product Information 16/10/2007
1.1.1BAE Software Configurations 
1.1.2BAE System Components 
1.1.3BAE Database Structure 
1.1.4BAE Data Types and Application Concepts 
1.1.5Exchanging Data with other Systems 
1.2Operating the Bartels AutoEngineer 03/09/2010
1.2.1BAE Startup and BAE User Interface 
1.2.2Function Selection 
1.2.3Basic System Functions 
1.2.4Graphic Input 
1.2.5Special Remarks 
1.3BAE Design Database 26/01/2007
1.3.1Database Concept 
1.3.2SCM Database Hierarchy 
1.3.3Layout Database Hierarchy 
1.3.4Logical Library 
2Circuit Design / CAE 02/12/2006
2.1General 22/12/2010
2.1.1Components and Features 
2.1.2Starting the Schematic Editor 
2.1.3Schematic Editor Main Menu 
2.1.4Customized Schematic Editor User Interface 
2.1.5In-built Schematic Editor System Features 
2.2SCM Library Symbol Design 11/10/2010
2.2.1Creating SCM Markers 
2.2.2Creating SCM Symbols 
2.2.3Creating SCM Labels 
2.3Designing SCM Circuits 11/10/2010
2.3.1Creating and Editing SCM Plans 
2.3.2Symbols 
2.3.3Connections, Labels, Busses 
2.3.4Text and Graphic 
2.4Special SCM Functions 11/10/2010
2.4.1Virtual Symbols 
2.4.2Groups 
2.4.3Plug Pin Assignment 
2.4.4Net Attributes 
2.4.5Tag Symbols 
2.4.6Templates 
2.4.7Exiting the Schematic Editor 
2.5SCM Plot Output 24/10/2010
2.5.1General Plot Parameters 
2.5.2HP-GL Pen Plot 
2.5.3HP-Laser Output 
2.5.4Postscript Output 
2.5.5Generic Output under Windows 
2.5.6Bitmap Plot Output to Windows Clipboard 
2.6Hierarchical Circuit Design 02/10/2007
2.6.1Sub-block Circuit Drawing 
2.6.2Sub-block Reference Symbol and Logical Sub-block Reference 
2.6.3Top Level Circuit Drawing 
2.7Backannotation 05/03/2007
3Packager / Backannotation 26/01/2007
3.1General 26/01/2007
3.1.1Components and Features 
3.2Packager 03/09/2010
3.2.1Starting the Packager 
3.2.2Packager Main Menu 
3.2.3Running the Packager 
3.2.4Example 
3.2.5Messages 
3.3Backannotation 05/03/2007
3.3.1Starting the Backannotation 
3.3.2Running the Backannotation 
3.3.3Example 
3.4Net List Utilities 26/01/2007
3.4.1Importing Logical Net Lists 
3.4.2Importing Physical Net Lists 
3.4.3Exporting Net List Data 
3.4.4Net Attributes 
4PCB Design / CAD 05/03/2007
4.1General 06/12/2010
4.1.1Components and Features 
4.1.2Starting the Layout System 
4.1.3Layout Editor Main Menu 
4.1.4Customized Layout Editor User Interface 
4.1.5In-built Layout System Features 
4.2Layout Library Symbol Design 11/10/2010
4.2.1Creating Layout Pads 
4.2.2Creating Layout Padstacks 
4.2.3Creating Layout Parts 
4.3Designing PCB Layouts 11/10/2010
4.3.1Creating and Editing PCB Layouts 
4.3.2Parts, Placement 
4.3.3Text and Graphic 
4.3.4Traces, Routing 
4.4Autoplacement 11/10/2010
4.4.1Part Set 
4.4.2Matrix Placement 
4.4.3Initial Placement 
4.4.4Placement Optimization 
4.5Autorouter 11/10/2010
4.5.1Starting the Autorouter 
4.5.2Autorouter Main Menu 
4.5.3Customized Autorouter User Interface 
4.5.4In-built Autorouter System Features 
4.5.5Autorouter Options 
4.5.6Autorouter Control 
4.5.7Autorouter Strategy 
4.5.8Autorouter Functions 
4.5.9Using the Autorouter 
4.6Special Layout Features 11/10/2010
4.6.1Batch Design Rule Check, Report 
4.6.2Color Setup, Color Tables, Pick Preference Layer 
4.6.3Layout Net List Changes 
4.6.4SCM Changes, Redesign 
4.6.5Defining and Editing Power Layers 
4.6.6Autorouter Via Keepout Areas 
4.6.7Area Mirror Mode 
4.6.8Automatic Copper Fill 
4.6.9Library Update 
4.6.10Back Net List 
4.6.11Blind and Buried Vias 
4.6.12Exiting the Layout System 
4.7CAM Processor 22/12/2010
4.7.1Starting the CAM Processor 
4.7.2CAM Processor Main Menu 
4.7.3Customized CAM Processor User Interface 
4.7.4In-built CAM Processor System Features 
4.7.5Plot Parameters 
4.7.6Power Layers 
4.7.7HP-GL Output 
4.7.8HP Laser Output 
4.7.9Postscript Output 
4.7.10Windows Generic Output 
4.7.11Bitmap Plot Output to Windows Clipboard 
4.7.12Gerber Photoplot 
4.7.13Drill Data 
4.7.14Insertion Data 
4.8CAM View 11/10/2010
4.8.1Starting the CAM View Module 
4.8.2CAM View Main Menu 
4.8.3Customized CAM View User Interface 
4.8.4In-built CAM View System Features 
4.8.5Processing Gerber Data 
4.8.6Processing Drilling and Milling Data 
4.8.7Retrieving Layouts from Gerber Data 
5IC/ASIC Design 26/01/2007
5.1General 11/10/2010
5.1.1Components and Features 
5.1.2IC Design System Startup 
5.1.3Chip Editor Main Menu 
5.1.4Chip Editor User Interface 
5.1.5Chip Editor System Features 
5.2IC Cell Library 11/10/2010
5.2.1IC Pin Definitions 
5.2.2IC Cell Definitions 
5.3IC Mask Layout 11/10/2010
5.3.1Creating and Editing Chip Layouts 
5.3.2Cell Makros, Placement 
5.3.3Text and Graphic 
5.3.4Traces, Routing 
5.4Cell Placer 26/01/2007
5.4.1Cell Placer Startup 
5.4.2Cell Placer Main Menu 
5.4.3Cell Placer System Features 
5.4.4Cell Placer Options 
5.4.5Cell Placer Control 
5.4.6Cell Placer Functions 
5.5Cell Router 11/10/2010
5.5.1Cell Router Startup 
5.5.2Cell Router Main Menu 
5.5.3Cell Router System Features 
5.5.4Cell Router Options 
5.5.5Cell Router Control 
5.5.6Cell Router Strategy 
5.5.7Cell Router Functions 
5.6IC Design Data Import and Export 06/02/2006
5.6.1GDS Data Import and Output 
5.6.2CIF Data Import and Output 
6Neural Rule System 26/01/2007
6.1General 26/01/2007
6.2Rule Definition 26/01/2007
6.2.1Bartels Rule Specification Language 
6.2.2Bartels Rule System Compiler 
6.3Rule System Applications 09/11/2013
6.3.1Circuit Design Rule System Applications 
6.3.2PCB Design Rule System Applications 
6.4Rule System Predicates 05/03/2007
6.4.1Circuit Design Rule System Predicates 
6.4.2PCB Design Rule System Predicates 
7Utilities 26/01/2007
7.1BAEHELP 25/01/2006
7.2BAESETUP, BSETUP 18/03/2011
7.3BICSET (IC Design) 28/01/2010
7.4BLDRING (IC Design) 28/01/2010
7.5CONCONV 26/01/2007
7.6COPYDDB 11/10/2010
7.7FONTCONV 26/01/2007
7.8FONTEXTR 26/01/2007
7.9INSTALL 26/01/2007
7.10LISTDDB 11/10/2010
7.11LOGLIB 18/11/2011
7.12NETCONV 11/10/2010
7.13REDASC 11/10/2010
7.14RULECOMP 26/01/2007
7.15ULC - User Language Compiler 11/10/2010
7.16User Language Interpreter 05/03/2007
7.17USERLIST 13/02/2009
7.18VALCONV 11/10/2010
 
Bartels :: Bartels AutoEngineer :: BAE Documentation :: BAE User Manual
^Contents<>>

Bartels AutoEngineer® - User Manual
© 1985-2025 Oliver Bartels F+E • Updated: 11 November 2009, 11:13 [UTC]
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